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MICRF004/RF044
Micrel
MICRF004
QwikRadioTM Low-Power VHF Receiver Advance Information
General Description
The MICRF004 QwikRadioTM VHF receiver is a single-chip OOK (on-off keyed) receiver IC for remote wireless applications. This device is a true single-chip, "antenna-in, data-out" device. All RF and IF tuning is accomplished automatically within the IC which eliminates manual tuning production costs and results in a highly reliable, extremely low-cost solution for high-volume wireless applications. The MICRF004 is extremely easy to apply, minimizing design and production costs, and improving time to market. The MICRF004 provides two fundamental modes of operation, fixed and sweep. In fixed mode, the device functions as a conventional superheterodyne receiver with an internal local oscillator operating at a single frequency based on an external reference crystal or clock. Fixed mode is for use with accurately-controlled transmitters utilizing crystal or SAW (surface acoustic wave) resonators. In sweep mode, the MICRF004 sweeps the internal local oscillator at rates greater than the baseband data rate. This effectively broadens the RF bandwidth of the receiver to a value equivalent to conventional superregenerative receivers. This allows the MICRF004 to operate with less expensive LC transmitters without additional components or tuning, even though the receiver topology is still superheterodyne. In this mode the reference crystal can be replaced with a less expensive 0.5% ceramic resonator. The MICRF004 features a shutdown control, which may be used for duty-cycled operation, and a wake-up output, which provides a logical indication of an incoming RF signal. These features make the MICRF004 ideal for low- and ultra-lowpower applications, such as RKE (remote keyless entry) and RFID (RF identification). Since all post-detection (demodulator) data filtering is provided on the MICRF004, no external filters are required. One of the four internal filter bandwidths must be externally selected based on data rate and code modulation format. Bandwidths range in binary steps, from 0.55kHz to 4.4kHz (sweep mode) or 1.1kHz to 8.8kHz (fixed mode).
Features
* * * * * * * * * * * * Complete VHF receiver on a monolithic chip 140MHz to 200MHz frequency range >200 meters typical range with monopole antenna 2.5kb/s sweep- and 10kb/s fixed-mode data rates Automatic tuning, no manual adjustment No filters or inductors required Low 240A operating supply current at 150MHz (10:1 duty cycle) Shutdown mode for >100:1 duty-cycle operation Wakeup for enabling decoders and microprocessors Very low RF antenna reradiation CMOS logic interface for standard ICs Extremely low external part count
Applications
* * * * Automotive remote keyless entry Long range RF identification Remote fan and light control Garage door and gate openers
Ordering Information
Part Number MICRF004BM MICRF004BN Junction Temp. Range -40C to +85C -40C to +85C Package 16-Lead SOP 16-Pin DIP
8-pin versions available. See "Custom 8-Pin Options," following page.
Typical Application
MICRF004 SEL0 SEL0 VSSRF VSSRF +5V ANT VDDRF VDDBB CTH 0.047F NC 4.85MHz SWEN (ceramic resonator) REFOSC SEL1 CAGC WAKEB SHUT DO VSSBB Data Output 4.7F
150MHz 1200b/s On-Off Keyed Receiver
QwikRadio is a trademark of Micrel, Inc. Micrel, Inc. * 1849 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 944-0970 * http://www.micrel.com
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MICRF004/RF044
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Pin Configuration
SEL0 1 VSSRF 2 VSSRF 3 ANT 4 VDDRF 5 VDDBB 6 CTH 7 NC 8
16 SWEN 15 REFOSC 14 SEL1 13 CAGC 12 WAKEB 11 SHUT 10 DO 9 VSSBB
16-Pin DIP (N) or SOP (M) Packages
MICRF004
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Pin Description
Pin Number 16-Pin Pkg. 1 2, 3 4 1 2 Pin Number 8-Pin Pkg. Pin Name SEL0 VSSRF ANT Pin Function Bandwidth Selection Bit 0 (Input): Configure with SEL1 to set the desired demodulator filter bandwidth. See Table 1. Internally pulled-up to VDDRF. RF [Analog] Return (Input): Ground return to the RF section power supply. See "Application Information" for bypass capacitor details. Antenna (Input): High-impedance, internally ac coupled receiver input. Connect this pin to the receive antenna. This FET gate input has approximately 2pF of shunt (parasitic) capacitance. See "Applications Information" for optional band-pass filter information. RF [Analog] Supply (Input): Positive supply input for the RF section of the IC. VDDBB and VDDRF should be connected together directly at the IC pins. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short as possible. Base-Band [Digital] Supply (Input): Positive supply input for the baseband section of the IC. VDDBB and VDDRF should be connected together at the IC pins. [Data Slicing] Threshold Capacitor (External Component): Capacitor extracts the dc average value from the demodulated waveform which becomes the reference for the internal data slicing comparator. See "Applications Information" for selection. not internally connected Base-Band [Digital] Return (Input): Ground return to the baseband section power supply. See "Application Information" for bypass capacitor and layout details. Digital Output (Output): CMOS-level compatible data output signal. Shutdown (Input): Shutdown-mode logic-level control input. Pull low to enable the receiver. This input has an internal pulled-up to VDDRF. Wakeup (Output): Active-low output that indicates detection of an incoming RF signal. Signal is determined by monitoring for data preamble. CMOSlevel compatible. AGC Capacitor (External Component): Integrating capacitor for on-chip AGC (automatic gain control). The decay/attack time-constant () ratio is nominally 10:1. See "Applications Information" for capacitor selection. Bandwidth Selection Bit 1 (Input): Configure with SEL0, programs to set the desired demodulator filter bandwidth. See Table 1. Internally pulled-up to VDDRF. Reference Oscillator (External Component or Input): Timing reference for on-chip tuning and alignment. Connect either a ceramic resonator or crystal (mode dependent, see "Application Information"). between this pin and VSSBB, or drive the input with an ac-coupled 0.5Vpp input clock. Sweep-Mode Enable (Input): Sweep- or fixed-mode operation control input. When VSWEN is high, the MICRF004 is in sweep mode; when SWEN is low, the receiver operates as a conventional single-conversion superheterodyne receiver. This pin is internally pulled-up to VDDRF.
5
3
VDDRF
6
VDDBB
7
4
CTH
8 9
NC VSSBB
10 11 12
5 6
DO SHUT WAKEB
13
7
CAGC
14
SEL1
15
8
REFOSC
16
SWEN
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Absolute Maximum Ratings (Note 1)
Supply Voltage (VDDRF, VDDBB) .................................... +7V Reference Oscillator Input Voltage (VREFOSC) .......... VDDBB Input/Output Voltage (VI/O) ................. VSS-0.3 to VDD+0.3 Junction Temperature (TJ) ...................................... +150C Storage Temperature Range (TS) ............ -65C to +150C Lead Temperature (soldering, 10 sec.) ................... +260C ESD Rating, Note 3
Operating Ratings (Note 2)
Supply Voltage (VDDRF, VDDBB) ................ +4.75V to +5.5V Ambient Temperature (TA) ......................... -40C to +85C Package Thermal Resistance (JA) 16-pin DIP (JA) ................................................... 90C/W 16-pin SOIC (JA) .............................................. 120C/W
Electrical Characteristics
VDDRF = VDDBB = VDD where +4.75V VDD 5.5V, VSS = 0V; CAGC = 4.7F, CTH = 0.047F; fREFOSC = 4.65MHz; TA = 25C, bold values indicate -40C TA +85C; current flow into device pins is positive; unless noted. Symbol IOP ISTBY Parameter Operating Current Condition continuous operation 10:1 duty cycle Standby Current VSHUT = VDD Notes 4, 6 Note 7 Notes 6, 7 145 fIN = 150MHz 20 RSC = 50 ANT pin, RSC = 50, Note 5 tATTACK / tDECAY TA = +85C extermal reference (250mV peak) ceramic resonator crystal ZREFOSC Reference Oscillator Input Impedance Reference Oscillator Input Sensitivity IREFOSC Demodulator ZCTH ZCTH IZCTH(leak) CTH Source Impedance CTH Source Impedance Variation CTH Leakage Current Demodulator Filter Bandwidth Demodulator Filter Bandwidth TA = +85C VSEL0 = VSEL1 = VSWEN = VDD, Notes 7, 9 VSEL0 = VSEL1 = VDD, VSWEN = VSS, Note 7, 9 Note 8 124 15 200 3960 7930 k % nA Hz Hz Reference Oscillator Current Note 10 0.1 4.5 6 5 10 290 2 -20 30 0.1 200 nA 422 80 Min Typ 2.4 240 0.35 Max Units mA A A
RF Section, IF Section Receiver Sensitivity fIF fBW fANT ZIN(ant) IF Center Frequency IF 3dB Bandwidth RF Input Range Antenna Input Impdeance Receive Modulation Duty-Cycle Maximum Receiver Input Spurious Reverse Isolation AGC Attack to Decay Ratio AGC Leakage Current Reference Oscillator Reference Oscillator Stabilization Time ms ms ms k Vp-p A -80 0.86 0.43 200 dBm MHz MHz MHz % dBm Vrms
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Symbol Parameter Condition Min Typ Max
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Units A 0.8VDD 0.2VDD 10 0.9VDD 0.1VDD 10 4 V V A V V s ms
Digital/Control Section IIN(pu) VIN(high) VIN(low) IOUT VOUT(high) VOUT(low) tR, tF tWAKEB
Note 1. Note 2. Note 3. Note 4:
Input Pull up Current Input High Voltage Input Low Voltage Output Current Output High Voltage Output Low Voltage Output Rise and Fall Times Wakeup Output Time
SEL0, SEL1, SWEN, VSHUT = VSS SEL0, SEL1, SWEN SEL0, SEL1, SWEN DO, WAKEB pins, push-pull DO, WAKEB pins, IOUT = -1A DO, WAKEB pins, IOUT = +1A DO, WAKEB pins, CLOAD = 15pF RFIN = TBDdBm, VSEL0 = VSEL1 = VSWEN = VSHUT = VSS
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Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. Devices are ESD sensitive. Use appropriate ESD precautions. Meets class 1 ESD test requirements, (human body model HBM), in accordance with MIL-STD-883C, method 3015. Do not operate or store near strong electrostatic fields. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The input signal is defined as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded data) at a data rate of 300b/s. The RF input is assumed to be matched into 50. Spurious reverse isolation represents the spurious components which appear on the RF input pin (ANT) measured into 50 with an input RF matching network. Sensitivity, a commonly specified receiver parameter, provides an indication of the receiver's input referred noise, generally input thermal noise. However, it is possible for a more sensitive receiver to exhibit range performance no better than that of a less sensitive receiver if the background noise is appreciably higher than the thermal noise. Background noise refers to other interfering signals, such as FM radio stations, pagers, etc. A better indicator of achievable receiver range performance is usually given by its selectivity, often stated as fntermediate frequency (IF) or radio frequency (RF) bandwidth, depending on receiver topology. Selectivity is a measure of the rejection by the receiver of "ether" noise. More selective receivers will almost invariably provide better range. Only when the receiver selectivity is so high that most of the noise on the receiver input is actually thermal will the receiver demonstrate sensitivity-limited performance.
Note 5: Note 6:
Note 7:
Parameter scales linearly with reference oscillator frequency fT. For any reference oscillator frequency other than 4.65MHz, compute new parameter value as the ratio:
x (parameter value at 4.65MHz) 4.65 Example: For reference oscillator freqency fT = 6.00MHz: 6.00 (parameter value at 6.00MHz) = x (paramter value at 4.65MHz) 4.65
Note 8: Parameter scales inversely with reference oscillator frequency fT. For any reference oscillator frequency other than 4.65MHz, compute new parameter value as the ratio:
fREFOSCMHz
4.65 x (parmeter value at 4.65MHz) fREFOSCMHz
Example: For reference oscillator frequency fT = 6.00MHz: 4.65 (parmeter value at 4.65MHz) = x (parmeter value at 4.65MHz) 6.00 Note 9: Demodulator filter bandwidths are related in a binary manner, so any of the (lower) nominal filter values may be derived simply by dividing this parameter value by 2, 4, or 8 as desired.
Note 10: External signal generator used. When a crystal or ceramic resonator is used, the minimum voltage is 300mVp-p. The reference oscillator voltage amplitude is a function of the quality of the ceramic or crystal resonator.
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Typical Characteristics
Supply Current vs. Frequency
4 TA = 25C VDD = 5V CURRENT (mA) 4
Supply Current vs. Temperature
f = 150MHz VDD = 5V
CURRENT (mA)
3
3
2
2
1 Sweep Mode, Continuous Operation 0 100 125 150 175 200 225 250 FREQUENCY (MHz)
1 Sweep Mode, Continuous Operation 0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
Functional Characteristics
Antenna Impedance
Frequency 140MHz 149MHz 160MHz 170MHz 173MHz 180MHz 184MHz 190MHz
Complex Impedance 12.53-j4.31.14 15.6-j406.87 15.18-j377.78 14.39-j355.36 13.51-j347.24 14.79-j333.98 13.47-j327.10 11.15-j316.43
Capacitance 2.63pF 2.63pF 2.63pF 2.63pF 2.64pF 2.64pF 2.65pF 2.65pF
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Functional Diagram
CAGC CAGC ANT RF Amp fRX fIF IF Amp 500kHz
5th Order Band-Pass Filter
AGC Control
2nd Order Programmable Low-Pass Filter
SwitchedCapacitor Resistor Comparator DO
IF Amp
Peak Detector RSC
fLO VDD VSS Programmable Synthesizer
CTH VHF Downconverter OOK Demodulator CTH
SEL0 SEL1 SWEN SHUT REFOSC CR Ceramic Resonator Reference Oscillator MICRF004 Reference and Control Wakeup Control Logic Resettable Counter WAKEB
Functional Description
Refer to "MICRF004 Block Diagram". Identified in the block diagram are the four sections of the IC: UHF Downconverter, OOK Demodulator, Reference and Control, and Wakeup. Also shown in the figure are two capacitors (CTH, CAGC) and one timing component (CR), usually a ceramic resonator. With the exception of a supply decoupling capacitor, these are the only external components needed by the MICRF004 to assemble a complete UHF receiver. Four control inputs are shown in the block diagram: SEL0, SEL1, SWEN, and SHUT. Using these logic inputs, the user can control the operating mode and selectable features of the IC. These inputs are CMOS compatible, and are pulled-up on the IC. Sweep-Mode Enable Logic-input SWEN selects either fixed-mode or sweep-mode operation. When SWEN is low, the IC is in fixed mode, and functions as a conventional superheterodyne receiver. When SWEN is high, the IC is in sweep mode. Fixed-Mode Operation For applications where the transmit frequency must be accurately set (that is, applications where a SAW transmitter is used for its mechanical stability), the MICRF004 may be configured as a standard superheterodyne receiver (fixed mode). Fixed-mode operation receives a narrower bandwidth making it less susceptable to competing signals. Fixed mode is selected by connecting SWEN to ground which forces the on-chip LO frequency to a fixed value. In fixed mode a crystal (higher frequency tolerance) must be used instead of a ceramic resonator (lower frequency tolerance). Data rates beyond 10kb/s are possible in fixed mode.
Sweep-Mode Operation In sweep mode, while the topology is still superheterodyne, the LO (local oscillator) is deterministically swept over a range of frequencies at rates greater than the data rate. When coupled with a peak-detecting demodulator, this technique effectively increases the RF bandwidth of the MICRF004, allowing the device to operate in applications where significant transmitter-receiver frequency misalignment may exist. The swept-LO technique does not affect the IF bandwidth, therefore noise performance is not degraded relative to fixed mode. The IF bandwidth is 500kHz whether the device is operating in fixed or sweep mode. Due to limitations imposed by the LO sweeping process, the upper limit on data rate in sweep mode is approximately 2.5kb/s. Examples of sweep-mode operation include applications utilizing low-cost LC-based transmitters, where the transmit frequency may vary up to 0.5% over initial tolerance, aging, and temperature. In sweep mode, the LO frequency is varied in a defined fashion which results in downconversion of all signals in a band approximately 1.5% around the nominal transmit frequency. The transmitter may drift up to 0.5% without the need to retune the receiver and without impacting system performance. Similar performance is not currently available with crystal-based superheterodyne receivers which can operate only with SAW- or crystal-based transmitters. In sweep mode only, a range reduction will occur in installations where there is an undesired competing signal of sufficient strength within of 2% to 3% around the transmit frequency. This is because the process indiscriminately in-
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cludes all signals within the sweep range. This same range reduction also occurs with superregenerative receivers as their RF bandwidth is also generally 2% to 3% around the nominal transmit frequency. Any superregenerative receiver application can instead use a MICRF004 in sweep mode. IF Bandpass Filter Rolloff response of the IF Filter is 5th order, while the demodulator data filter exhibits a 2nd order response. The multiplication factor between the reference oscillator frequency fT and the internal local oscillator (LO) is 32.5x for fixed mode, and 32.25x for sweep mode (that is, for fT = 6.00MHz in fixed mode, fLO = 6.00MHz x 32.5 = 195.0MHz). Bandwidth The inputs SEL0 and SEL1 control the demodulator filter bandwidth in four binary steps (550Hz to 4400Hz in sweep, 1100Hz to 8800Hz in fixed mode). Bandwidth must be selected according to the application. See "Applications Information" for the bandwidth programming table. Slicing Level Extraction of the dc value of the demodulated signal for purposes of logic-level data slicing is accomplished using the external threshold capacitor CTH and the on-chip switchedcapacitor "resistor" RSC, shown in the block diagram. Since the effective resistance of RSC is 124k, the CTH connection can be considered a low-pass RC filter with source impedance of 124k. Slicing level time constant values vary somewhat with decoder type, data pattern, and data rate, but typical values range from 5ms to 50ms. Optimization of the value of CTH is required to maximize range. Automatic Gain Control The signal path has AGC (automatic gain control) to increase input dynamic range. An external capacitor, CAGC, must be connected to the CAGC pin of the device. The ratio of decayto-attack time-constant is fixed at 10:1 (that is, the attack time constant is 1/10th of the decay time constant), and this ratio cannot be changed by the user. However, the attack time constant is set externally by choosing a value for CAGC. The AGC control voltage is carefully managed on-chip to allow duty-cycle operation of the MICRF004 in excess of 100:1. When the device is placed into shutdown mode (SHUT pin pulled high), the AGC capacitor floats, to retain the voltage. When operation is resumed, only the voltage droop on the capacitor due to leakage must be replenished, therefore a relatively low-leakage capacitor is recommended for duty-cycled operation. The actual tolerable leakage will be application dependent. Clearly, leakage performance is less critical when the device off-time is low (milliseconds) and more critical when the off-time is high (seconds). To further enhance duty-cycled operation of the IC, the AGC push and pull currents are increased for a fixed time immedi-
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ately after the device is taken out of shutdown mode (turnedon). This compensates for AGC capacitor voltage droop while the IC is in shutdown mode, reduces the time to restore the correct AGC voltage, and therefore extends maximum achievable duty ratios. Push-pull currents are increased by 45 times their nominal values. The fixed time period is based on the reference oscillator frequency fT, 10.9ms for fT = 6.00MHz, and varies inversely as fT varies. Reference Oscillator All timing and tuning operations on the MICRF004 are derived from the internal Colpitts reference oscillator. Timing and tuning is controlled through the REFOSC pin in one of three ways: 1. Connect a ceramic resonator 2. Connect a crystal 3. Drive this pin with an external timing signal The third approach is attractive for lowering system cost further if an accurate reference signal exists elsewhere in the system, for example, a reference clock from a crystal- or ceramic-resonator-controlled microprocessor. An externally applied signal should be ac-coupled and resistively-attenuated, or otherwise limited, to approximately 0.5Vpp. The specific reference frequency required is related to the system transmit frequency and to the operating mode of the receiver as set by the SWEN pin. Wake-Up Function The wake-up circuit is available for reducing power consumption of the overall wireless system. WAKEB is an output logic signal, which goes active low when the IC detects a constant RF carrier "header" in the demodulated output signal. This output may be used to enable external circuits, such as a data decoder or microprocessor, when there is a detection of an incoming RF signal. The wake-up function is unavailable when the IC is in shutdown mode. The wake-up function consists of a resettable counter, based on an internal 23.4kHz clock (created from a 6.0MHz reference frequency). When this constant carrier is detected, without interruption for 128 clock cycles of 25kHz or 5.12ms, WAKEB will transition low and stay low until data begins. This approach is utilized over others because constant tones in excess of 5ms are rare, resulting in few false detections, and this technique does not require the introduction of a signal path offset which impacts achievable range. Shutdown Function The shutdown function is controlled by a logic state applied to the SHUT pin. When VSHUT is high, the device goes into low-power standby mode, consuming less than 1A. This pin is pulled high internally. It must be externally pulled low to enable the receiver.
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I/O Pin Interface Circuitry Interface circuitry for the various I/O pins of the MICRF004 are diagrammed in Figures 1 through 6. The ESD protection diodes at all input and output pins are not shown. ANT Pin
Active Load ANT 50 3pF 6k Active Bias
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Figure 3 illustrates the CAGC pin interface circuit. The AGC control voltage is developed as an integrated current into a capacitor CAGC. The attack current is nominally 15A, while the decay current is a 1/10th scaling of this, nominally 1.5A, making the attack/decay timeconstant ratio a fixed 10:1. Signal gain of the RF/IF strip inside the IC diminishes as the voltage at CAGC decreases. Modification of the attack/decay ratio is possible by adding resistance from the CAGC pin to either VDDBB or VSSBB, as desired. Both the push and pull current sources are disabled during shutdown, which maintains the voltage across CAGC, and improves recovery time in duty-cycled applications. To further improve duty-cycle recovery, both push and pull currents are increased by 45 times for approximately 10ms after release of the SHUT pin. This allows rapid recovery of any voltage droop on CAGC while in shutdown. DO and WAKEB Pins
VDDBB 10A Comparator
VDDBB
Figure 1. ANT Pin The ANT pin is internally ac-coupled, through a 3pF capacitor, to an RF N-channel MOSFET, as shown in Figure 1. Impedance from this pin to VSS is high at low frequencies and decreases as frequency increases. In the VHF frequency range, the device input can be modeled as a 6.3k in parallel with 2pF (pin capacitance) shunt to the VSSRF pin.
CTH Pin
DO
Demodulator Signal 2.85Vdc PHI2B PHI1B
CTH 6.9pF PHI1
10A VSSBB
VSSBB
PHI2
VSSBB
Figure 2. CTH Pin Figure 2 illustrates the CTH-pin interface circuit. The CTH pin is driven from a P-channel MOSFET source-follower with approximately 10A of bias. Transmission gates TG1 and TG2 isolate the 6.9pF capacitor. Internal control signals PHI1/PHI2 are related in a manner such that the impedance across the transmission gates looks like a "resistance" of approximately 100k. The dc potential at the CTH pin is approximately 1.6V CAGC Pin
VDDBB
Figure 4. DO and WAKEB Pins The output stage for DO (digital output) and WAKEB (wakeup output) is shown in Figure 4. The output is a 10A push and 10A pull switched-current stage. This output stage is capable of driving CMOS loads. An external buffer-driver is recommended for driving high-capacitance loads. REFOSC Pin
Active Bias 200k REFOSC 30pF 30pF 250 VDDBB
1.5A Comparator
67.5A
30A VSSBB
VSSBB
Figure 5. REFOSC Pin
CAGC
Timout 15A 675A
VSSBB
The REFOSC input circuit is shown in Figure 5. Input impedance is high (200k). This is a Colpitts oscillator with internal 30pF capacitors. This input is intended to work with standard ceramic resonators connected from this pin to the VSSBB pin, although a crystal may be used when greater frequency accuracy is required. The nominal dc bias voltage on this pin is 1.4V.
Figure 3. CAGC Pin
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MICRF004/RF044 SEL0, SEL1, SWEN, and SHUT Pins
VDDBB
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Q1 VSSBB SHUT SEL0, SEL1, SWEN Q4 Q3 VSSBB Q2 to Internal Circuits
Figure 6a. SEL0, SEL1, SWEN
VDDBB
Q1 VSSBB SHUT
Q2 to Internal Circuits Q3 VSSBB
Figure 6b. SHUT Control input circuitry is shown in Figures 6a and 6b. The standard input is a logic inverter constructed with minimum geometry MOSFETs (Q2, Q3). P-channel MOSFET Q1 is a large channel length device which functions essentially as a "weak" pullup to VDDBB. Typical pullup current is 5A, leading to an impedance to the VDDBB supply of typically 1M.
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Utilizing Wake-Up To utilize the wake-up function, a burst of RF carrier in excess of 5.5ms must be received at the start of each data code word (preferred for best communication reliability) or a single 5.5ms RF carrier tone must be received at the start of the data pattern. When this constant carrier is detected, without interruption, WAKEB will transition low and stay low until data begins. For designers who wish to use the wakeup function while squelching the output, a positive squelching offset voltage must be used. This simply requires that the squelch resistor be connected to a voltage more positive than the quiescent voltage on the CTH pin so that the data output is low in absence of a transmission. AGC Configuration By adding resistance from the CAGC pin to VDDBB or VSSBB in parallel with the AGC capacitor, the ratio of decayto-attack time constant may be varied, although the value of such adjustments must be studied on a per-application basis. Generally the design value of 10:1 is adequate for the vast majority of applications. To maximize system range, it is important to keep the AGC control voltage ripple low, preferably under 10mVpp once the control voltage has attained its quiescent value. For this reason capacitor values of at least 0.47F are recommended. Frequency and Capacitor Selection Selection of the reference oscillator frequency fT, slicing level capacitor (CTH), and AGC capacitor (CAGC) are briefly summarized in this section. Selecting Reference Oscillator Frequency fT (Fixed Mode) As with any superheterodyne receiver, the difference between the internal LO (local oscillator) frequency fLO and the incoming transmit frequency fTX ideally must equal the IF center frequency. Equation 1 may be used to compute the appropriate fLO for a given fTX: (1)
Application Information
Transmitter Compatibility Generally, the MICRF004 can be operated in sweep mode, using a low-cost ceramic resonator. Sweep mode works with LC-, crystal-, or SAW-based transmitters, without any significant range difference. In fixed mode a SAW-based or crystalcontrolled transmitter must be used. Bypass and Output Capacitors The bypass and output capacitors connected to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only (that is, keep VSSBB currents from flowing through the VSSRF return path). Crystal or Ceramic Resonator Selection Do not use resonators with integral capacitors since capacitors are included in the IC. If operating in fixed mode, a crystal must be used. In sweep mode, either a crystal or ceramic resonator may be used. External Timing Signals Externally applied signals should be ac-coupled and the amplitude must be limited to approximately 0.5Vpp. Bandwidth Programming Bandwidth must be selected accoring to the application.
SEL0 1 0 1 0 SEL1 1 1 0 0 Demodulator Bandwidth Sweep Mode 4400Hz 2200Hz 1100Hz 550Hz FIXED Mode 8800Hz 4400Hz 2200Hz 1100Hz
Table 1. Bandwidth Selection Optional BandPass Filter For applications located in high ambient noise environments, a fixed value band-pass network may be connected between the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. A typical filter is included in Figure 7a. Squelch During quiet periods (no signal) the data output (DO pin) transitions randomly with noise, presenting problems for some decoders. A simple solution is to introduce a small offset, or squelch voltage, on the CTH pin so that noise does not trigger the internal comparator. Usually 20mV to 30mV is sufficient, and may be introduced by connecting a severalmegohm resistor from the CTH pin to either VSS or VDD, depending on the desired offset polarity. Since the MICRF004 has receiver AGC, noise at the internal comparator input is always the same, set by the AGC. The squelch offset requirement does not change as the local noise strength changes from installation to installation. Introducing squelch will reduce range modestly. Only introduce an amount of offset sufficient to quiet the output.
f fLO = fTX 0.787 TX 150
Frequencies fTX and fLO are in MHz. Note that two values of fLO exist for any given fTX, distinguished as "high-side mixing" and "low-side mixing," and there is generally no preference of one over the other. After choosing one of the two acceptable values of fLO, use Equation 2 to compute the reference oscillator frequency fT: (2)
f fT = LO 32.5 Frequency fT is in MHz. Connect a crystal of frequency fT to REFOSC on the MICRF004. Four-decimal-place accuracy on the frequency is generally adequate. The following table identifies fT for some common transmit frequencies when the MICRF004 is operated in fixed mode.
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A standard 20% X7R ceramic capacitor is generally sufficient. Selecting CAGC Capacitor in Continuous Mode Selection of CAGC is dictated by minimizing the ripple on the AGC control voltage by using a sufficiently large capacitor. Factory experience suggests that CAGC should be in the vicinity of 0.47F to 4.7F. Large capacitor values should be carefully considered as this determines the time required for the AGC control voltage to settle from a completely discharged condition. AGC settling time from a completely discharged (zero-volt) state is given approximately by Equation 6: (6)
t = 1.333C AGC - 0.44
Transmit Frequency fTX 149.675MHz 184.225MHz
Reference Oscillator Frequency fT 4.6318MHz 5.7010MHz
Table 2. Common Transmitter Frequencies
Selecting REFOSC Frequency fT (Sweep Mode) Selection of the reference oscillator frequency fT in sweep mode is much simpler than in fixed mode due to the LO sweeping process. Also, accuracy requirements of the frequency reference component are significantly relaxed. In sweep mode, fT is given by Equation 3:
32.25 Connect a ceramic resonator of frequency fT to the REFOSC pin on the MICRF004. Two-decimal-place accuracy is generally adequate. A crystal may be used. A crystal may be mandatory in some cases to reduce receive frequency ambiguity if the transmit frequency ambiguity is excessive. Use Equation 3a to compute sweep-mode frequency band coverage (fBC):
(3a) fBC = 0.5fT + 2fIF + fBW Example: (3)
fT =
fLO
fTX = 170MHz fT = 5.27MHz
fIF = 170 0.86MHz 150 170 0.43MHz 150
where: CAGC is in F, and t is in seconds. Selecting CAGC Capacitor in Duty-Cycle Mode Use of 0.47F or greater is strongly recommended for best range performance. Use low-leakage type capacitors (dipped tantalum, ceramic, or polyester)for duty-cycled operation to minimize AGC control voltage droop. Generally, droop of the AGC control voltage during shutdown should be replenished as quickly as possible after the IC is "turned-on". As described in the functional description, for about 10ms after the IC is turned on, the AGC push-pull currents are increased to 45 times their normal values. Consideration should be given to selecting a value for CAGC and a shutdown time period such that the droop can be replenished within this 10ms period. Polarity of the droop is unknown, meaning the AGC voltage could droop up or down. Worst-case from a recovery standpoint is downward droop, since the AGC pullup current is 1/10th magnitude of the pulldown current. The downward droop is replenished according to the Equation 7:
fBW = then:
I
(7)
C AGC
=
V t
fBC = 5.07MHz centered symmetrically about 170MHz. Selecting Capacitor CTH The first step in the process is selection of a data-slicing-level time constant. This selection is strongly dependent on system issues including system decode response time and data code structure (that is, existence of data preamble, etc.). This issue is covered in more detail in Application Note 22. Source impedance of the CTH pin is given by equation (4), where fT is in MHz:
(4) RSC = 124k 4.65 fT
where: I = AGC pullup current for the initial 10ms (67.5A) CAGC = AGC capacitor value t = droop recovery time V = droop voltage For example, if user desires t = 10ms and chooses a 4.7F CAGC, then the allowable droop is about 144mV. Using the same equation with 200nA worst case pin leakage and assuming 1A of capacitor leakage in the same direction, the maximum allowable t (shutdown time) is about 0.56s for droop recovery in 10ms.
Assuming that a slicing level time constant has been established, capacitor CTH may be computed using equation (5)
C TH = RSC
MICRF004
12
February 9, 2000
MICRF004/RF044
150MHz Receiver/Decoder Application Figure 7a illustrates a typical application for the MICRF004 VHF Receiver IC. This receiver operates continuously (not duty cycled) in sweep mode, and features 6-bit address decoding and two output code bits.
Micrel
Operation in this example is at 150MHz, and may be customized by selection of the appropriate frequency reference (CR1), and adjustment of the antenna length. The value of C4 would also change if the optional input filter is used. Changes from the 1kb/s data rate may require a change in the value of R1. A bill of materials accompanies the schematic.
+5V Supply Input C4 Optional Filter 33pf, 33nH L1
U1 MICRF004 SEL0 SEL0 VSSRF VSSRF ANT VDDRF VDDBB C2 2.2F CTH NC
4.85MHz SWEN (ceramic resonator) REFOSC SEL1 CAGC WAKEB SHUT DO VSSBB 0.47F
U2 HT-12D A0 A1 A2 A3 A4 A5 A6 A7 VSS VDD VT OSC1 OSC2 DIN D11 D10 D9 D8 R2 1k R1 68k Code Bit 0 Code Bit 1
C1 4.7F
RF Baseband (Analog) (Digital) Ground Ground
Figure 7a. 150MHz, 1kb/s On-Off Keyed Receiver/Decoder
Item U1 U2 CR1 D1 R1 R2 C1 C3 C2 C4
Part Number MICRF004 HT-12D CSA4.65MG SSF-LX100LID
Manufacturer Micrel Holtek Murata Lumex Bourns Panasonic Panasonic Panasonic Panasonic
Description UHF receiver logic decoder 4.65MHz ceramic resonator red LED 68k 1/4W 5% 1k 1/4W 5% 4.7F dipped tantalum capacitor 0.47F dipped tantalum capacitor 2.2F dipped tantalum capacitor 8.2pF COG ceramic capacitor
Figure 7b. Bill of Material
Vendor Bourns Holtek Lumex Murata Panasonic
Telephone (909) 781-5500 (408) 894-9046 (800) 278-5666 (800) 241-6574 (201) 348-7000
FAX (909) 781-5273 (408) 894-0838 (847) 359-8904 (770) 436-3030 (201) 348-8164
Figure 7c. Component Vendors
February 9, 2000
13
MICRF004/RF044
MICRF004/RF044
Micrel
Package Information
PIN 1
0.157 (3.99) 0.150 (3.81)
DIMENSIONS: INCHES (MM)
0.020 (0.51) REF 0.050 (1.27) BSC
0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102)
45 0-8 0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79)
0.0648 (1.646) 0.0434 (1.102)
0.394 (10.00) 0.386 (9.80)
SEATING PLANE
16-Lead SOP (M)
0.780 MAX (19.812) PIN 1 0.030-0.110 RAD (0.762-2.794)
.2500.005 (6.3500.127)
0.0250.015 (0.6350.381) 0.1300.005 (3.3020.127) 0.040 TYP (1.016)
0.020 (0.508)
0.290-0.320 (7.336-8.128)
0-10 0.020 MIN (0.508) 0.125 MIN (3.175) 0.009-0.015 (0.229-0.381) 0.0180.003 (0.4570.076) 0.1000.010 (2.5400.254) +0.025 -0.015 +0.635 8.255 -0.381 0.325
(
)
16-Pin DIP (N)
MICRF004
14
February 9, 2000
MICRF004/RF044
Micrel
February 9, 2000
15
MICRF004/RF044
MICRF004/RF044
Micrel
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 1999 Micrel Incorporated
MICRF004
16
February 9, 2000

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